1. Field of the Invention
The invention relates to a method for reforming an insulating borosilicate glass film (hereinafter, referred to as "BSG film") formed by a CVD technique.
2. Description of the Prior Art
Most of inter-layer insulating films used for semiconductor devices are of SiO.sub.2 or SiO.sub.2 -based materials. Such insulating films of SiO.sub.2 have a relative permittivity of 4.0 (measured at a frequency of 1 MHz). The capacitance between the conductor layers with an insulating film between is determined according to the equation: EQU C=.epsilon..sub.0 .multidot..epsilon..multidot.A/t
where
.epsilon..sub.0 =the permittivity of the vacuum PA1 .epsilon.=relative permittivity of the insulating film PA1 A=for purposes of calculation, the area of the facing or overlapping parts of conductor layers between which the insulating film is located. However, contributions from portions other than the facing or overlapping portion of the conductor layers should be taken into account. PA1 t=distance between the conductor layers where the insulating film intervenes. PA1 (1) Use of SiO.sub.2 films containing Si--F bonds or F. For films formed by hydrolysis of an organic silicon compound containing F, an .epsilon. of 3.7 has been reported. Where the silicon oxide film containing F is formed by means of a plasma CVD technique, using a gas mixture consisting of C.sub.2 F.sub.6. and TEOS (tetraethyl orthosilicate), a low relative permittivity has been reported. PA1 (2) Use of organic resin films of TEFLON.TM.. A value of less than 3.0 has been reported. PA1 (4) Use of SiDBN films or SiOBN films formed by sputtering.
Though parasitic capacitance is inevitable in any semiconductor device, an excessively large value of parasitic capacitance will result in crosstalk between conductor layers or delay of signal propagation. Particularly, when a multi-layer metalized structure is used in order to improve integration of a semiconductor device, overlapping or facing areas of conductors are increased. This increase results in increase of the parasitic capacitance. Also, the smaller the scale of the patterns is, the smaller is the spacing between adjacent conductors. When the spacing between adjacent conductors becomes smaller than that between the upper and lower conductors, the parasitic capacitance will increase to the extent of producing a significant affect on the device characteristics.
Reduction of the parasitic capactiance requires a reduction in the relative permittivity (.epsilon.) of the insulating films between the conductor layers. For this purpose, the following approaches have been taken:
However, in case of (1), it is not yet sufficiently clear what kind of bad affects on the device characteristics are produced by the use of insulating films containing Si--F bonds or F.
In case of (2) and (3), the insulating films comprise a substance completely different from SiO.sub.2. It is doubtful whether or not such insulating films are practical.
Also, in case of (4), since the insulating films are not stable, they are not suitable for application as semiconductor devices.